Posts made by bo
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IP SoC China 2020 演讲Video
IP SoC China 2020
网址:https://www.design-reuse-embedded.com/ipsocdays/ipsocdays2020/china2020/welcome.jsp视频地址:
https://www.design-reuse-embedded.com/ipsocdays/ipsocdays2020/china2020/video.jsp?k=Yibo%2BFan优酷地址:
https://v.youku.com/v_show/id_XNDg0NzA1MzE1Mg==.html?spm=a1z3jc.11711052.0.0&isextonly=1 -
RE: H265顶层接口变量代表的意思
这个我们未来会整理一个更详细的使用说明文档。
目前你可以参考testbench的接口设计方法来做 -
RE: 开源H.265/HEVC Encoder IP Core V2.0发布
未来我们会推出开源版的FPGA实例,可以包括AXI总线接口、软件驱动程序,简单的Demo等
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RE: 开源H.265/HEVC Encoder IP Core V2.0发布
@Giljohn 这个代码不包括编码器外围电路(总线接口,地址管理,Buffer缓存等),enc_top仅仅是编码器核心IP的顶层。如果需要在FPGA上运行,需要自行封装AXI总线接口。
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OpenASIC @GitHub Release
https://github.com/openasic-org
Any code update can be found in our Github project
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RE: About of run 'H.264 Video Encoder Demo [PYNQ]'
最近手头上事情比较多,稍后安排出个详细一点的文档
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开源H.264 Video Encoder IP Core V2.0 发布
H.264 Video Encoder IP Core V2.0
开源H.264 硬件视频编码器IP核
H.264 Video Encoder IP Core 是开源的H.264硬件视频编码器,实现了H.264(AVC)的大部分功能。它由复旦大学专用集成电路与系统国家重点实验室(State Key Lab of ASIC & System,Fudan University)视频图像处理实验室(VIP Lab)范益波教授研究团队开发完成,并开放源代码。任何组织个人可以无偿使用上述代码用于研究和生产目的,VIP Lab将会持续更新并维护编码器的软硬件开发。
基本Feature
- AVC/H.264 Baseline Profile
- YUV 4:2:0
- Bitdepth 8
- FHD@60fps
- GOP:I/P
- MB: 16x16
- 1/4 Sub-pixel interpolation
- Search range: 16
- All Inter Partition mode
- All 9 Intra prediction mode
- CAVLC
- Deblocking Filter
本次更新内容
- H265ENC V2.0 功能更新内容
- h264enc v2.0
a.修复了1.0版本中存在的bug - INTRA – Intra mode decision & partition decision
a.调整C model的预测优先级从而匹配硬件代码 - IME – Integer motion estimation
a.修改生成mv_cost的方式,提高预测准确性 - FME– Fractional motion estimation
a.修复在fmv计算和亮度预测块生成上的bug
b.重新实现了1/2插值的逻辑 - TQ - Transformation & Quantization
a.增加QPc,使之符合标准
b.增加量化和idct模块的位宽,防止发生溢出 - CAVLC - Entropy coding
a.修改状态机从而正确编码色度分量
b.修复从TQ模块读取残差时的bug - FETCH
a.修复取预测像素时的一些bug
b.修改模块内对RAM读逻辑
- 完成测试项目
我们测试了416x240到1920x1080的多个序列,确认在不同分辨率下以及在不同QP下编码器能够正常工作。测试中发现1.0版本中各个模块的已知bug均已修复。
测试结果如下图所示:
Intra test:CAVLC,10 frames
Inter test:CAVLC,DB on,10 frames
关于VIP Lab
复旦大学VIP实验室专注于从事下一代视频、图像、AI硬件处理器研究,包括超高清视频、图像编解码器(CODEC IP),图像处理器(ISP IP),神经网络处理器(NN IP)等。
实验室网站 http://viplab.fudan.edu.cn代码下载
http://openasic.org/topic/79/h264-video-encoder-rtl-ip-core-version-2-0
关注我们
微信公众号: OpenASIC
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H264 Video Encoder RTL IP Core [Version 2.0]
H264 Video Encoder RTL IP Core V2.0
Feature List
- AVC/H.264 Baseline Profile
- YUV 4:2:0
- Bitdepth 8
- FHD@60fps
- GOP:I/P
- MB: 16x16
- 1/4 Sub-pixel interpolation
- Search range: 16
- All Inter Partition mode
- All 9 Intra prediction mode
- CAVLC
- Deblocking Filter
H264ENC V2.0 Improvements
- h264enc v2.0
a.Fix the bugs in previous version - INTRA – Intra mode decision & partition decision
a.Modify the mode priority of C model to match RTL - IME – Integer motion estimation
a.Modify the generation of mv_cost to support P frame - FME– Fractional motion estimation
a.Fix some bugs in fmv calculation and luma prediction
b.Redesign the 1/2 interpolator logic - TQ - Transformation & Quantization
a.Add QPc to quantize chroma residuals
b.Incease the bitwidth of quant modules and idct module to prevent overflow - CAVLC - Entropy coding
a.Modify the FSM to encode chroma component properly
b.Fix a bug in fetching residuals from TQ - FETCH
a.Fix several bugs in fetching predicted pixels
b.Modify the logic of reading RAM
Download
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RE: H265 ENCODER RTL V2.0仿真教程
@jie 我们最新的C model 压缩比 相当于 x265 medium 水平,后期准备优化到比medium更好一点。 开源2.0版压缩率没有过多优化
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RE: H265 Video Encoder RTL IP Core [Version 2.0]
H265ENC V2.0 Feature Improvement
- h265enc v2.0
a. Update the I/P prediction algorithms, and the hardware pipeline to improve the coding efficiency
b. Fix the bugs in the previous version
c. Check the RTL V2.0 by nLint, and fix the errors and warnings
d. Meet the 400MHz synthesized by Design Complier,and fix critical path,warning
e. IP Core V2.0 has been validated by the FPGA - PreI – Intra mode decision
a. Support CTU-level Rate control,based on the CABAC bit number to change the QP adaptively - PosI – Intra partition decision
a. Prediction for the partition decision is based on the original pixels
b. The RD cost for the partition decision is based on the SATD and simplified rate estimation - IME – Integer motion estimation
a. Configurable IME parameters by the ime_cfg.dat, such as the search range, search center , and search shape
b. Extend the search range to ±64
c. By the H-V SRAMs, the search direction of novel IME can be the slope
d. By the Bit Truncation, the pixels bit depth is truncated into 4 bit from 8bit with only less than 1dB PSNR loss, but with great improvement on the area and power - FME – Fractional motion estimation
a. Support the SKIP and MERGE decision by the RD cost similar to the FME decision
b. Fix the bugs in the interpolation - REC – Reconstruction loop
a. Support Intra CTU in Inter Frame by the costs from PosI and FME to decide I/P of current CTU
b. Support the SKIP CU, where the prediction samples will be the reconstruction samples
c. Rearrange the DCT RTL and fix the bugs - DBSAO – Deblocking filter & sample adaptive offset
a. Update the DB filter order and remove the transpose memory to reduce memory usage
b. Support the SAO EO mode - CABAC – Entropy coding
a. Update the RTL and fix the bugs
b. Support SKIP、MERGE、Intra CTU in Inter Frame and so on
c. Remove the ROM in the previous version
- h265enc v2.0
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开源H.265/HEVC Encoder IP Core V2.0发布
H.265 Video Encoder IP Core V2.0
开源H.265 硬件视频编码器
H.265 Video Encoder IP Core 是开源的H.265硬件视频编码器,实现了H.265(或叫HEVC)的大部分功能。它由复旦大学专用集成电路与系统国家重点实验室(State Key Lab of ASIC & System,Fudan University)视频图像处理实验室(VIP Lab)范益波教授研究团队开发完成,并开放源代码。任何组织个人可以无偿使用上述代码用于研究和生产目的,VIP Lab将会持续更新并维护H.265硬件视频编码器的开发。
基本Feature
- HEVC/H.265 Main Profile
- YUV 4:2:0
- Bitdepth:8
- 4K@30fps, 400MHz
- GOP: I/P
- CTU: 64x64
- CU: 8x8~64x64
- PU: 4x4~64x64
- TU: 4x4/8x8/16x16/32x32
- 1/4 Sub-pixel
- Search range:64
- All 35 Intra prediction mode
- CABAC
- Deblocking Filter
- SAO(Sample Adaptive Offset)
- Rate control: CBR/VBR(Software-based)
- Rate control: CTU level(Hardware-based)
- SKIP/MERGE
- Intra CTU in Inter frame
本次更新内容
- H265ENC V2.0 功能更新内容
- h265enc v2.0
a. 更新I/P帧预测算法、硬件流水线,优化编码效率
b. 修复原有代码中的bug
c. RTL V2.0经过nLint语法检查,fix error及warning等
d. 经过DC综合,满足400MHz,fix critical path,warning
e. IP Core V2.0经过FPGA验证编码正确 - PreI – Intra mode decision
a. 新增CTU-level Rate control,根据CABAC已编码的码流大小,动态调整当前CTU的QP大小 - PosI – Intra partition decision
a. 基于原始像素做预测
b. 基于SATD的distortion,以及简化的rate计算,提升编码效率 - IME – Integer motion estimation
a. IME 参数可配置,通过ime_cfg.dat,配置搜索范围以及搜索中心搜索形状等
b. 搜索范围扩大至±64
c. 通过H-V reference SRAMs,支持45°等倾斜的搜索角度
d. 通过Bits Truncation,将像素值从8bit截到4bit,PSNR损失不到1dB,面积和功耗能大幅度减小 - FME – Fractional motion estimation
a. 新增SKIP/MERGE判决,基于SATD的cost计算判决当前CU块是否SKIP
b. fix插值公式bug - REC – Reconstruction loop
a. 支持Intra CTU in Inter Frame,可通过PosI及FME的cost判断当前CTU是Intra或者Inter编码
b. 支持SKIP,即预测值直接作为重建值
c. 整理DCT代码,并修复其中bug - DBSAO – Deblocking filter & sample adaptive offset
a. 更新DB中滤波顺序,去除原有DB中的转置memory
b. 新增SAO EO模式计算 - CABAC – Entropy coding
a. 更新代码,修复其中bugs
b. 支持SKIP、MERGE、Intra CTU in Inter Frame等
c. 去除ROM
- H265ENC V2.0 完成测试项目
相较于第一版的RTL,我们在第二版中做了更为充分的测试,确认在各种情况下都能正确完成编码。测试序列中,我们采用了六个HEVC官方测试序列,从416x240到3840x2160等不同分辨率的视频序列。
BlowingBubbles: 416x240
BasketballDrill: 832x480
ChinaSpeed: 1024x768
FourPeople: 1280x720
BasketballDrive: 832x480
TouchDownPass: 3840x2160
也在不同QP下完成了上述所有测试序列的测试工作:10, 17, 22, 27, 32, 37, 42, 47, 51。测试过程中发现的各个模块的bug也已修复,并通过了上述所有测试序列以及QP的测试。测试结果如下图所示:
Intra test
Inter test
关于VIP Lab
复旦大学VIP实验室专注于从事下一代视频、图像、AI硬件处理器研究,包括超高清视频、图像编解码器(CODEC IP),图像处理器(ISP IP),神经网络处理器(NN IP)等。
实验室网站 http://viplab.fudan.edu.cn代码下载
http://openasic.org/topic/71/h265-video-encoder-rtl-ip-core-version-2-0
关注我们
微信公众号: OpenASIC
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H265 Video Encoder RTL IP Core [Version 2.0]
H265 Video Encoder RTL IP Core V2.0
Feature List
HEVC/H.265 Main Profile
YUV 4:2:0
Bitdepth 8
4K@30fps, 400MHz
GOP: I/P
CTU: 64x64
CU: 8x8~64x64
PU: 4x4~64x64
TU: 4x4/8x8/16x16/32x32
1/4 Sub-pixel interpolation
Search range: 64
All 35 Intra prediction mode
CABAC
Deblocking Filter
SAO(Sample Adaptive Offset)
Rate control: CBR/VBR(Software-based)
Rate control: CTU level(Hardware-based)
SKIP/MERGE
Intra CTU in Inter frameDownload