OpenASIC

Introduction xkISP is an open source image signal processor (ISP) based on Xilinx HLS development tools. xkISP is jointly developed by VIP Lab of Fudan university and DAMO CTL lab of Alibaba. Up to now, xkISP supports to process 12-bit raw image data of any resolution. The entire pipeline includes 17 function modules shown in the following: File Structure xkISP ├─fpga │ host.cpp │ top.cpp │ top.h │ xcl2.cpp │ xcl2.h │ ├─src │ isp_top.h │ file_define.h │ "*module*".cpp │ "*module*".h │ ... │ ├─tb │ tb_"*module*".cpp │ ... │ ├─tcl │ Makefile │ "*module*".tcl │ "*module*"_directives.tcl │ ... │ ├─tv │ Makefile │ hls_param.txt │ input.raw │ isp │ readme_for_tv ├─ LICENSE ├─ setup_env.sh └─ README.md fpga contains code files for top level integration verification. src contains source code files which are the single module of the xkISP project and head files(file_define.h) for single module test. tb contains code files for verificating the function consistency with Cmodel(tv/isp) in the module level. tcl contains the scripts for execuating the code files in the tb("module".tcl) and adding the pragma command for the code files in the src ("module"_directives.tcl). Makefile in the tcl is used for module level verification. tv contains the files for generating the test vectors. You can read the readme_for_tv for more details. setup_env.sh is used to designate the development tools. (Vitis HLS or Vivado) Download Clone this repo in Github: git clone https://github.com/openasic-org/xkISP.git cd xkISP

Categories

代码发布 | OpenASIC Code Release

新闻文档 | News & Documents

交流讨论 | General Discussion

问题反馈 | Comments & Feedback