Check it here: http://xk.openasic.org/product/3

xkAVC Baseline Encoder（K3）

• Feature List
  Supported Platform : ZCU102 (xczu9eg-ffvb1156-2-e)
  Performance : ~1920x1080 @ 60fps @ 120MHz
  Profile: AVC Baseline
  Supported Frame Type: I P Frame
  Picture Format: YUV420
  Pixel Depth: 8-bit
  LCU Size: 16x16
  QP Range: 0-51

• K3.ie Implementation Results (FPGA)
  Platform: ZCU102 FPGA Board
  Frequency: 120MHz
  LUT: (274080) 52414
  BRAM: (912) 9.5
  DSP: (2520) 112
  LUTRAM: (144000) 4138
  FF: (548160) 30919

• Download
  http://xk.openasic.org/product/3

• Q&A
  Any question can be submit here : http://openasic.org/category/5/xkavc-ip-core

Introduction

xkAVC Encoder (K3) is a video encoder support H.264/AVC standard. K3 is based on Xilinx FPGA platform (ZCU102 Dev. Board), and it support 1080p60 realtime video encoding. K3 includes a series of subset IP cores, such as K3.ie (Intra-only Encoder)，K3.pe（Intra+Inter Encoder)，K3.id（Intra-only Decoder），K3.pd（Intra+Inter Decoder） .

Download
http://xk.openasic.org/product/3

目前可以用U200/U250这种大容量FPGA运行的，带摄像头的FPGA目前还没找到合适的支持RAW数据输入的摄像头模块

是的 可以用在国产FPGA上，开源代码使用没有限制，是免费的

@林炸虾 欢迎联系 bo@xksilicon.com

@erwang 我们的书已经出版了，《视频编解码芯片设计原理》https://item.jd.com/10059208033891.html

Introduction

xkISP is an open source image signal processor (ISP) based on Xilinx HLS development tools. xkISP is jointly developed by VIP Lab of Fudan university and DAMO CTL lab of Alibaba. Up to now, xkISP supports to process 12-bit raw image data of any resolution. The entire pipeline includes 17 function modules shown in the following:

File Structure

xkISP
├─fpga
│      host.cpp
│      top.cpp
│      top.h
│      xcl2.cpp
│      xcl2.h
│     
├─src
│    isp_top.h
│    file_define.h
│    "*module*".cpp
│    "*module*".h
│    ...
│   
├─tb
│     tb_"*module*".cpp
│    ...
│   
├─tcl
│      Makefile
│      "*module*".tcl
│      "*module*"_directives.tcl
│    ...
│   
├─tv
│     Makefile
│     hls_param.txt
│     input.raw
│     isp
│     readme_for_tv
├─  LICENSE
├─  setup_env.sh
└─  README.md

• fpga contains code files for top level integration verification.
• src contains source code files which are the single module of the xkISP project and head files(file_define.h) for single module test.
• tb contains code files for verificating the function consistency with Cmodel(tv/isp) in the module level.
• tcl contains the scripts for execuating the code files in the tb("module".tcl) and adding the pragma command for the code files in the src ("module"_directives.tcl). Makefile in the tcl is used for module level verification.
• tv contains the files for generating the test vectors. You can read the readme_for_tv for more details. setup_env.sh is used to designate the development tools. (Vitis HLS or Vivado)

Download

Clone this repo in Github:

git clone https://github.com/openasic-org/xkISP.git
cd xkISP

目前我们开源版本没有解码器，企业合作版本是有解码器的

https://github.com/openasic-org/xkISP