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  • 发布OpenASIC论坛最新开源硬件RTL:H.264 Encoder IP; H.265 Encoder IP

    13 Topics
    17 Posts
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  • 发布OpenASIC最新消息,开源项目文档

    21 Topics
    199 Posts
    H
    @li_fpga TB文件内应用路径文件有问题,我的正确的给你 仅供参考!!![0_1750144059512_1750144023812.jpg](Uploading 100%)
  • 123 Topics
    399 Posts
    C
    不晓得是否可以在此宣传招聘信息,如有不妥,将及时删帖,保证技术讨论纯粹环境,感恩的心! 【英伟达上海】深度学习视频架构实习生 要求:硕博在读生,27/28届,实习三个月及以上,base上海 简历投递至cazhao@nvidia.com Video Architect Intern- Shanghai We’re looking for highly talented students to build excellent AI products. At NVIDIA, you’ll have the opportunity to work with senior engineers to develop cutting‑edge AI technologies used in real‑world applications such as RTX Video Super Resolution, NVIDIA Smooth Motion, the NVIDIA DLSS series, and NVIDIA GeForce NOW. It’s a great place to innovate and transform AI research into products. What you’ll be doing: Research next‑generation video codec standards and hardware architectures (e.g., AV2). Conduct research on AI‑based video processing and compression systems. Study and prototype algorithms for the above areas; deploy models across platforms; optimize models, including custom CUDA kernel implementations. What we need to see: Master’s/PhD candidate in EE/CS or a related field. Basic proficiency in C/C++/Python is required. Quick learner, creative, and willing to take on challenges in new fields. Fluent in English with strong communication skills. Familiarity with video codec standards such as H.264 and AV1 is a big plus. Experience with deep‑learning–based model training, inference, and deployment is a plus. Background with CUDA development is a plus
  • Got a question? Ask away!

    15 Topics
    34 Posts
    M
    看了下K3的配置代码main.c,里面有很多如下SRAM_WRITE的操作,不太明白具体功能是什么,有没有文档说明?然后关于提供的文档的寄存器说明希望能再详细点。 ++++++++++++++++++++++++++++++++++++++ // intra SRAM_WRITE( 0+0 ,0x6704); SRAM_WRITE( 0+1 ,0x627e); SRAM_WRITE( 0+2 ,0x5da0); SRAM_WRITE( 0+3 ,0x596b); SRAM_WRITE( 0+4 ,0x5409); SRAM_WRITE( 0+5 ,0x4edf); SRAM_WRITE( 0+6 ,0x4a48); SRAM_WRITE( 0+7 ,0x4397); SRAM_WRITE( 0+8 ,0x3e59); SRAM_WRITE( 0+9 ,0x39d0);