H.265 Video Encoder IP RTL Simulation 方法
-
RTL Simulation 方法
文件结构
. |-- rtl | |-- cabac | |-- db | |-- enc_defines.v | |-- fetch | |-- fme | |-- h265core.v | |-- ime | |-- intra | |-- mc | |-- mem | |-- pre_i | |-- top | `-- tq `-- sim `-- h265coreModelsim
# go to simulation directory cd ./sim/h265core # run simulation ./vsim.runNCsim
# go to simulation directory cd ./sim/h265core # run simulation ./make ncsimSimulation result
*** CHECK TOP ! *** fime auto check is on fme auto check is on mvd auto check is on db auto check is on fetch auto check is on bs auto check is on *** TEST P FRAMES ! *** at 00000600, Frame Number = 00, mb_x_first = 00, mb_y_first = 00 at 00050065, Frame Number = 00, mb_x_first = 01, mb_y_first = 00 at 00091015, Frame Number = 00, mb_x_first = 02, mb_y_first = 00 ... ... ... at 10594605, Frame Number = 07, mb_x_first = 01, mb_y_first = 00 at 10637335, Frame Number = 07, mb_x_first = 02, mb_y_first = 00 at 10649965, Frame Number = 07, mb_x_first = 00, mb_y_first = 00 *** TEST I FRAMES ! *** at 10660075, Frame Number = 00, mb_x_first = 00, mb_y_first = 00 at 10778975, Frame Number = 00, mb_x_first = 01, mb_y_first = 00 at 10876295, Frame Number = 00, mb_x_first = 02, mb_y_first = 00 ... ... ... at 40551735, Frame Number = 09, mb_x_first = 06, mb_y_first = 03 at 40638475, Frame Number = 09, mb_x_first = 00, mb_y_first = 00 at 40680215, Frame Number = 10, mb_x_first = 00, mb_y_first = 00 *** CHECK FNISHED ! *** Simulation complete via $finish(1) at time 40682215 NS + 0 ./tb_top.v:578 $finish ;
-
目前需要在Linux平台上仿真，Window下会报错，请知悉。
-
由于本项目仿真一直在Linux下，如果采用Window平台仿真，可能会出现如下错误
at 00000600, Frame Number = 00, mb_x_first = 00, mb_y_first = 00 # at 00049380, Error! # (MV_X,MV_Y) should be (0c,0c), however is (04,0d) # at 00050020, Error! # FIME_PARTITION should be 000000000000000000000000000000000000000000, however is 001000000000000000000000000000001100000011 # at 00050065, Frame Number = 00, mb_x_first = 01, mb_y_first = 00 # ** Note: $finish : ./tb_top.v(783) # Time: 50380 ns Iteration: 0 Instance: /tb_top修改办法: 修改/sim/h265core/tb_top.v
# 将所有的$fopen语句修改一下 $fopen( XXXX ,"r" ); -> $fopen( XXXX ,"rb" )
-
范老师，您好，貌似代码中码率的设置是“0~51”，tb文件中设置的码率值是22。能介绍下这个设定的码率值和真实码率的对应关系么，谢谢！
-
@tomash 这个是QP值。目前版本代码没有码率控制，需要自行添加一个模块来实时改变QP就行
-
范老师，您好。运行的系统是centos还是ubuntu？方便透漏是哪个版本么，谢谢！
-
为什么不用Systenverilog、VMM和UVM等进行仿真呢
-
@xuweisheng 还没怎么用过
-
@bo 在modelsim/questasim中采用systemverilog语言开发基于UVM验证方法学的测试平台testbench，测试起来非常方便（可以搜索一下关于IC验证工程师的相关岗位信息）
-
I'm getting some errors while doing the simulaion.
The parameter 'bs_byte_cnt' isn't matching between f265 and h265
How can it be corrected
I've attached the screenshot..Please tell模拟时出现一些错误。
f265和h265之间的参数'bs_byte_cnt'不匹配
如何纠正
我已附上屏幕截图。.请告诉
-
Yibo Sir,
Where is the output hevc file located and what is the input file given??
I checked the code thoroughly but did not find any mention about input or ouput??
PLEASE TELL SIR艺博先生
输出hevc文件在哪里，输入文件是什么？
我彻底检查了代码，但未发现有关输入或输出的任何内容？？
请告诉先生
-
@bo
Sir,can you please tell which module is to be added for rate control??
I'm currently working on h265enc_v2.0 made by you..
I'm not able to get the ouput because of some errors in simulation.I'm attaching the screenshot of the errors in this.
Please tell how to correct the errors.先生，您能告诉我们要添加哪个模块进行速率控制吗？
我目前正在研究您制作的h265enc_v2.0。
由于模拟中存在一些错误，因此我无法获得输出。我在此附加了错误的屏幕截图。
请告诉您如何纠正错误。
-
@sandeepvk22 I encountered a similar problem
did you solve the problem
-
@mbahadir No sir..I think there is some issue in the code ...I tried many methids but all of them failed
I tried using h264enc_v2.0 developed by Yibo Sir and it worked perfectly and so is using it
-
@bo
老师您好，想请教您几个问题：
1、你们实验室做的H265标准编码器与HM16.6的客观BD-Rate性能大概是多少呢？
2、预测模式中inter和intra的所有模式都进行PK吗？
3、在做ME的时候搜索范围是全图大小，还是一定范围，范围是多少？
4、整个RDO过程bits估计有参考HM那一套上下文模型进行更新吗？
5、intra prediction 在角度预测的时候参考像素用的是原始的还是重构的？
6、是否有一个RTL code的说明文档可以参考呢？
感谢老师解答。