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各位先進, 我已經將H.264 verilog源碼順利做完simulation, 但是在看testbench時, 發現要兩個external buffer, 一個是pixel_ram, 另一個是P Frame Memory (ref_mem). 這兩個在testbench, size很大, 而且timing requirement非常緊(1個 clock就要讀到). 請問在實際工程上, 要如何實現?